Digital System Design 3 (ELEE09024)
Electronics and Electronic Engineering
Normal Year Taken
Delivery Session Year
Must have understanding and knowledge of: Boolean Algebra, logic gates, Combinational logic design, minimisation of combinational logic (e.g. Karnaugh Maps), basic sequential circuit design.
This course is a lecture course and is taken by all students taking the third year of electronics and/or electrical engineering degree in Semester 1. It comprises one 22 lecture module. Digital System Design 3 aims to build on the material presented in the second year and enhance students understanding and design skills of combinational and sequential digital circuit design techniques. To introduce the concepts and techniques for datapath and FSM design.
Logic design fundamentals. State machines, equivalent states and state reduction. Implicationcharts.Introduction to hardware description languages (HDL). Synthesis. Behavioural, structural and dataflow (register-transfer level, RTL) models.Programmable logic devices. Simple programmable logic devices, complex programmable logicdevices, field programmable gate arrays, programmable SoCs.Design Examples. Data path, controller model.Adders. Critical path, carry-lookahead adder, parallel prefix adder.Multipliers. Add and shift multiplier, array multiplier. Signed integer/fraction multiplier.State machine charts. Microprogramming.Designing with FPGAs. Shannon s decomposition. Carry chains. Cascade chains. Dedicatedmultipliers. Dedicated memory. Cost of programmability. Design translation (Synthesis). Mapping,placement and routing.Floating point arithmetic. Multiplication and addition.Verification of digital systems. Functional verification. Timing verification.
Written Exam 100%, Coursework 0%, Practical Exam 0%
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